1. Field of the Invention
The present invention relates to a semiconductor device having a capacitor, in particular, of which dielectric film is made of a material having a high dielectric constant.
2. Discussion of Background
A dynamic random access memory (DRAM) having memory cells, respectively composed of a metal oxide semiconductor (MOS) transistor and a capacitor, has been subjected to integration by microminiaturizing its elements because a structure of the memory cell is simple. Although the elements have been microminiaturized in accordance with such integration of the memory cell, it is necessary to retain a capacitance of the capacitor a predetermined value or more in consideration of operation of the elements.
For this, a capacitor structure, in which opposing areas of electrodes are increased by making a capacitor a three dimensional shape and a capacitance of capacitor is increased, such as a stacked capacitor having opposing electrodes of three dimensional shape by forming the capacitor in an inter-layer insulating film formed on a semiconductor substrate and a trench-type capacitor having opposing electrodes of three dimensional shape by forming a trench in a semiconductor substrate and a capacitor in this trench, is recently utilized against a conventional planer capacitor structure, in which opposing electrodes of a capacitor has a plane shape.
However, it becomes difficult to assure a predetermined capacitance of capacitor even though the three dimensional capacitor structure is used in response to trend of high integration, for example, a stage of DRAM of 256 Mbit.
Therefore, a structure with a dielectric film provided between opposing electrodes in place of an insulating film employed in a conventional capacitor structure is recently paid attention. According to this structure, not only a capacitance of capacitor obtained by increasing the areas of the opposing electrodes is made large, but also a dielectric constant of the capacitor is increased by the above location of the dielectric film, whereby the capacitance of capacitor is resultantly increased.
FIG. 11 is a schematic view for illustrating an example of a DRAM memory cell having a structure that a dielectric film is provided between opposing electrodes of a capacitor. As illustrated, in a semiconductor substrate 101, an element isolating layer 102, and source/drain areas 103 and 104 are formed. Further, a gate oxide film 105 is formed on the semiconductor substrate 101 at a position between the source/drain areas 103 and 104; and a gate electrode 106 is formed on the gate oxide film 105, whereby MOSFET is fabricated.
In the semiconductor substrate having this MOSFET, an inter-layer insulating film 107 is formed; and a lower electrode 108, one of the opposing electrodes of the capacitor, is formed on the inter-layer insulating film 107. A contact hole 109, in which doped polysilicon 109a and a barrier metal 109b are embedded, is provided in the inter-layer insulating film 107 so as to electrically connect the lower electrode 108 to the source/drain area 104.
A dielectric film 110 made of barium strontium titanate (hereinbelow referred to as BST) or the like is formed on the lower electrode 108 as if covering the electrode, and an upper electrode 111, the other electrode of the opposing electrodes, is formed so as to be opposite to the lower electrode 108 through the dielectric film 110. Another insulating film is further formed on the capacitor.
JP-A-9-232542 discloses a DRAM memory cell, in which an underlying insulating film made of silicon oxide or the like is formed just below the lower electrode for preventing the insulating film under the lower electrode from being removed at a time of forming the lower electrode.
Hereinbelow, a portion, at which the dielectric film 110 is in contact with the inter-layer insulating film 107 and the lower electrode 108, is designated by 200.
In the conventional semiconductor device, as illustrated in FIG. 11, the dielectric film is directly in contact with the inter-layer insulating film made of silicon oxide or the like in the vicinity of the portion 200.
Because the dielectric film does not have a high dielectric constant in an amorphous phase and has the high dielectric constant after changed to a crystalline state by crystal growth of the film, the dielectric film is formed to be changed to the crystalline state at the time of forming the film or later. On the contrary, the inter-layer insulating film is normally made of a silicon oxide film in an amorphous phase.
Therefore, the dielectric film is in contact with the inter-layer insulating film having a crystal structure largely different from that of the dielectric film, at around the portion 200 illustrated in FIG. 11, whereby the dielectric film to be formed on the inter-layer insulating film is insufficiently crystallized. Thus, there was a problem that a capability for holding an electric charge of the capacitor was deteriorated by a leak current caused by insufficient crystallization in a portion of the dielectric film positioned at an end of the capacitor.